Z86D73 Datasheet, PDF (48/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
42
Counter/Timer Functional Blocks
Input Circuit
The edge detector monitors the input signal on P31 or P20. Based on CTR1 D5–
D4, a pulse is generated at the Pos Edge or Neg Edge line when an edge is
detected. Glitches in the input signal that have a width less than specified (CTR1
D3, D2) are filtered out (see Figure 19).
CTR1 D5,D4
P31
MUX
P20
Glitch Filter
Edge Detector
Pos Edge
Neg Edge
CTR1 D6
CTR1 D3,D2
Figure 19. Glitch Filter Circuitry
T8 Transmit Mode
Before T8 is enabled, the output of T8 depends on CTR1, D1. If it is 0, T8_OUT is
1; if it is 1, T8_OUT is 0. See Figure 20.
PS019402-1103
PRELIMINARY