Z89175 Datasheet, PDF (65/68 Pages) Zilog, Inc. – Voice Processing Controllers

Zilog
Z89175/Z89176
Voice Processing Controllers
R250 IRQ
D7 D6 D5 D4 D3 D2 D1 D0
IRQ0 = P32 Input
IRQ1 = P33 Input
IRQ2 = P31 Input
IRQ3 = DSP
IRQ4 = T0
IRQ5 = T1
Inter Edge
P31 ↓ P32 ↓ = 00
P31 ↓ P32 ↑ = 01
P31 ↑ P32 ↓ = 10
P31 ↑↓ P32 ↑↓ = 11
Figure 77. Interrupt Request Register
(FAH: Read/Write)
R251 IMR
D7 D6 D5 D4 D3 D2 D1 D0
1 Enables IRQ0-IRQ5
(D0 = IRQ0)
1 Enables RAM Protect
1 Enables Interrupts
Figure 78. Interrupt Mask Register
(FBH: Read/Write)
R252 FLAGS
D7 D6 D5 D4 D3 D2 D1 D0
User Flag F1
User Flag F2
Half Carry Flag
Decimal Adjust Flag
Overflow Flag
Sign Flag
Zero Flag
Carry Flag
Figure 79. Flag Register
(FCH: Read/Write)
R253 RP
D7 D6 D5 D4 D3 D2 D1 D0
2
Expanded Register File Bank
Working Register Group
Figure 80. Register Pointer
(FDH: Read/Write)
R254 SPH
D7 D6 D5 D4 D3 D2 D1 D0
Stack Pointer Upper
Byte (SP8 - SP15)
Figure 81. Stack Pointer High
(FEH: Read/Write)
R255 SPL
D7 D6 D5 D4 D3 D2 D1 D0
Stack Pointer Lower
Byte (SP0 - SP7)
Figure 82. Stack Pointer Low
(FFH: Read/Write)
DS97TAD0100
PRELIMINARY
65