Z89175 Datasheet, PDF (32/68 Pages) Zilog, Inc. – Voice Processing Controllers

Z89175/Z89176
Voice Processing Controllers
Z8^® FUNCTIONAL DESCRIPTION (Continued)
Register File. The standard Z8^® register file consists of
four I/O port registers, 236 general-purpose registers, and
15 control and status registers (R0-R3, R4-R239, and
R241-R255, respectively). The instructions access regis-
ters directly or indirectly through an 8-bit address field.
This allows a short, 4-bit register address using the Regis-
ter Pointer (Figure 19). In the 4-bit mode, the register file
is divided into 16 working register groups, each occupying
16 continuous locations. The Register Pointer addresses
the starting location of the active working register group
(Figure 20).
Note: Register Group E (Registers EF-E0) is only access-
ed through a working register and indirect addressing
modes.
RAM Protect. The upper portion of the Z8’s RAM address
spaces 80H to EFH (excluding the control registers) is pro-
tected from reading and writing. The RAM Protect bit op-
tion is mask-programmable and is selected by the custom-
er when the ROM code is submitted. After the mask option
is selected, the user activates the RAM Protect from the in-
ternal ROM code by loading a bit D6 in the IMR register to
either a 0 (OFF) or a 1 (ON). A 1 in D6 indicates RAM Pro-
tect enabled.
Stack. The Z8’s external data memory or the internal reg-
ister file is used for the stack. The 16-bit Stack Pointer
(R255-R254) is used for the external stack which can re-
side only from 24576 to 65535 in ROM mode or 0 to 65535
in ROMless mode. An 8-bit Stack Pointer (R255) is used
for the internal stack residing within the 236 general-pur-
pose registers (R239-R4). SPH can be used as a general-
purpose register when using internal stack only.
Zilog
Expanded Register File. The register file on the Z8 has
been expanded to allow for additional system control reg-
isters and for mapping of additional peripheral devices
along with I/O ports into the register address area. The Z8
register address space has been implemented as 16
banks of 16 register groups per bank (Figure 20). These
register banks are known as the ERF (Expanded Register
File). Bits 7-4 of register RP (Register Pointer) select the
working register group. Bits 3-0 of register RP select the
Expanded Register bank (Figure 21).
The SMR register, WDT Register, control and data regis-
ters for Port 4 and Port 5, and the DSP control register are
located in Bank F of the Expanded Register File. Bank B
of the Expanded Register File consists of the Mailbox In-
terface through which the Z8 and the DSP communicate.
The rest of the Expanded Register is not physically imple-
mented and is open for future expansion.
R253 RP
D7 D6 D5 D4 D3 D2 D1 D0
Expanded Register File Bank
Working Register Group
Figure 19. Register Pointer Register
32
PRELIMINARY
DS97TAD0100