Z89175 Datasheet, PDF (60/68 Pages) Zilog, Inc. – Voice Processing Controllers

Z89175/Z89176
Voice Processing Controllers
Z8^® EXPANDED REGISTER FILE REGISTERS (Continued)
Zilog
(B) 0F
D7 D6 D5 D4 D3 D2 D1 D0
DSP EXT3,
Bits D7-D0
P5D (FH) 04H
D7 D6 D5 D4 D3 D2 D1 D0
Data
Figure 58. Incoming Register from DSP EXT3
(Low Byte)
(B) 0FH [Read-Only]
Expanded Register Bank F
PCON (F) %00
D7 D6 D5 D4 D3 D2 D1 D0
Note: Reset condition is 11111110
R Always "1"
W 0 P34,P37 Standard output
1 P34,P37 Comparator output
R Always "1"
W No effect
Figure 62. Port 5 Data Register
(F) 04H [Read/Write]
P5M (FH) 05H
D7 D6 D5 D4 D3 D2 D1 D0
* Default setting after Reset
P50-P57 I/O Definition
0 Defines Bit as Output
1 Defines Bit as Input*
Returns "FF" Upon Read
Figure 63. Port 5 Mode Register
(F) 05H [Write-Only]
Figure 59. Port Configuration Register (PCON)
(F) 00H [Write-Only]
P4D (FH) 02H
D7 D6 D5 D4 D3 D2 D1 D0
Data
Figure 60. Port 4 Data Register
(F) 02H [Read/Write]
P4M (FH) 03H
D7 D6 D5 D4 D3 D2 D1 D0
P40-P47 I/O Definition
0 Defines Bit as Output
1 Defines Bit as Input
Returns "FF" Upon Read
P45M (FH) 06H
(Write only)
D7 D6 D5 D4 D3 D2 D1 D0
Port 4 Configuration Bit
0 Open-Drain
1 Push-pull
No effect
Port 5 Configuration Bit
0 Open-Drain
1 Push-pull
No effect
Figure 64. Port 4 and 5 Configuration Register
(F) 06H [Write-Only]
Figure 61. Port 4 Mode Register
(F) 03H [Write-Only]
60
PRELIMINARY
DS97TAD0100