Z89175 Datasheet, PDF (25/68 Pages) Zilog, Inc. – Voice Processing Controllers

Zilog
Z89175/Z89176
Voice Processing Controllers
Port 2 (P27-P20). Port 2 is an 8-bit, bidirectional, CMOS signal assignment for Port 3 lines P31 and P36 is dictated
compatible I/O port. These eight I/O lines are configured by the direction (input or output) assigned to bit 7, Port 2
under software control independently as inputs or outputs. (Figure 13).
Port 2 is always available for I/O operation. The input buff-
2
ers are Schmitt-triggered. Bits programmed as outputs can ^{The Auto Latch on Port 2 puts valid CMOS levels on all}
be globally programmed as either push-pull or open-drain. ^{CMOS inputs which are not externally driven. Whether this}
level is 0 or 1, cannot be determined. A valid CMOS level,
Port 2 can be placed under handshake control. In this con- rather than a floating node, reduces excessive supply cur-
figuration, Port 3 lines P31 and P36 are used as the hand- rent flow in the input buffer.
shake controls lines /DAV2 and RDY2. The handshake
Open-Drain
OEN
Out
In
DS97TAD0100
Z89175/176
MCU
Port 2
(I/O)
Handshake Controls
/DAV2 and RDY2
(P31 and P36)
1.5
2.3V Hysteresis
R = 500 KΩ
Figure 13. Port 2 Configuration
PRELIMINARY
Pad
Auto Latch
25