Z85C3008PEG Datasheet, PDF (31/81 Pages) Zilog, Inc. – CMOS SCC Serial Communications Controller

CMOS SCC Serial Communications Controller
Product Specification
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Framing errors and overrun errors are detected and buffered together with the partial char-
acter on which they occur. Vectored interrupts allow fast servicing or error conditions
using dedicated routines. A built-in checking process avoids the interpretation of a fram-
ing error as a new start bit. A framing error results in the addition of one-half a bit time to
the point at which the search for the next start bit begins.
The SCC does not require symmetric transmit and receive clock signals – a feature that
allows the use of a wide variety of clock sources. The transmitter and receiver handle data
at a rate supplied to the receive and transmit clock inputs. In Asynchronous modes, the
SYNC pin can be programmed as an input used for functions such as monitoring a ring
indicator.
Synchronous Modes
The SCC supports both byte and bit-oriented synchronous communication. Synchronous
byte-oriented protocols are handled in several modes. They allow character synchroniza-
tion with a 6-bit or 8-bit sync character (Monosync), and a 12-bit or 16-bit synchroniza-
tion pattern (Bisync), or with an external sync signal. Leading sync characters are
removed without interrupting the CPU.
5- or 7-bit synchronous characters are detected with 8- or 16-bit patterns in the SCC by
overlapping the larger pattern across multiple incoming synchronous characters, as shown
in Figure 10.
7 Bits
SYNC SYNC
SYNC
Data
Data
Data
Data
8
16
Figure 10. Detecting 5- or 7-Bit Synchronous Characters
CRC checking for Synchronous byte-oriented modes is delayed by one character time so
that the CPU can disable CRC checking on specific characters. This feature permits the
implementation of protocols such as IBM Bisync.
Both CRC-16 (X¹⁶ + X¹⁵ + X¹² +1) and CCITT (X¹⁶ + X¹² + X⁵ + 1) error-checking
polynomials are supported. Either polynomial can be selected in all Synchronous modes.
You can preset the CRC generator and checker to all 1’s or all 0’s. The SCC also provides
a feature that automatically transmits CRC data when no other data is available for trans-
PS011706-0511
Functional Descriptions