Z85C3008PEG Datasheet, PDF (25/81 Pages) Zilog, Inc. – CMOS SCC Serial Communications Controller

CMOS SCC Serial Communications Controller
Product Specification
17
For example,
WR4A Write Register 4 for channel A
RR3 Read Register 3 for either/both channels
Register
RR0
RR1
RR2
RR3
RR8
RR10
RR12
RR13
RR15
Tables 1 and 2 list the SCC registers and provide a brief description of their functions.
Table 1. SCC Read Register Functions
Function
Transmit/Receive buffer status and External status
Special Receive Condition status
Modified interrupt vector (Channel B only) Unmodified interrupt vector (Channel A only)
Interrupt Pending bits (Channel A only)
Receive Buffer
Miscellaneous status
Lower byte of Baud Rate Generator time constant
Upper byte of Baud Rate Generator time constant
External/Status interrupt information
Register
WR0
WR1
WR2
WR3
WR4
WR5
WR6
WR7
WR7*
WR8
WR9
WR10
WR11
WR12
Table 2. SCC Write Register Functions
Function
CRC initialize, initialization commands for the various modes, register pointers
Transmit/Receive interrupt and data transfer mode definition
Interrupt vector (accessed through either channel)
Receive parameters and control
Transmit/Receive miscellaneous parameters and modes
Transmit parameters and controls
Sync characters or SDLC address field
Sync character or SDLC flag
Extended Feature and FIFO Control (WR7 Prime) 85C30 Only
Transmit buffer
Master interrupt control and reset (accessed through either channel)
Miscellaneous transmitter/receiver control bits
Clock mode control
Lower byte of Baud Rate Generator time constant
PS011706-0511
Functional Descriptions