DS543 Datasheet, PDF (8/24 Pages) Xilinx, Inc – MOST Network Interface Controller v1.4

MOST Network Interface Controller v1.4
Receive Routing Engine
The Receive Routing Engine (RX_RE) receives the decoded MOST frame and allocates data to the
appropriate buffer for further processing. The RX_RE module utilizes a shared lookup table with the
following information:
• Indication of which data to keep and which to discard
• Mapping of received synchronous timeslot data to logical channels
Asynchronous and Synchronous data is written to the appropriate location in the receive buffer
(RX_BUF) based on the look up table.
Receive Buffer
The Receive Buffer (RX_BUF) contains sufficient storage for synchronous and asynchronous receive
data. Data is organized on a logical channel basis.
Transmit Buffer
The Transmit Buffer (TX_BUF) contains sufficient storage for synchronous and asynchronous transmit
data. Data is organized on a logical channel basis.
Transmit Routing Engine
The Transmit Routing Engine (TX_RE) maps logical channels to timeslots.
Transmit MAC
The Transmit MAC (TX_MAC) module encodes synchronous, asynchronous and control data into the
transmit MOST frame. This module has several functions including frame encode, and parallel to serial
conversion.
Transmit Bypass
The Transmit Bypass (TX_BYPASS) module muxes in the receive serial stream, in the event that this
MOST NIC core is operating in a bypass mode.
Common Routing Table
This Common Routing Table (COM_ROUTE) module is a common RAM resource shared by both the
receive and transmit paths as a look-up table.
Control Processor
The control processor (CONTROL) handles control messages. Processing of control messages is con-
tained within the MOST NIC core. This submodule decodes the control messages and also generates a
suitable response to received control messages. Any received normal message is forwarded through
the Memory Mapped Register to the external microprocessor.
The control processor can hold up to two receive messages and up to two transmit messages in addi-
tion to the most recent transmit message with the response received on the ring. Any messages that
require external processing are forwarded via the Memory Mapped Register interface. These messages
are processed via an interrupt driven register interface.
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DS543 September 19, 2008