DS543 Datasheet, PDF (6/24 Pages) Xilinx, Inc – MOST Network Interface Controller v1.4

MOST Network Interface Controller v1.4
Standalone MOST NIC
Figure 3 illustrates a standalone MOST NIC. This example utilizes the MOST NIC core, MicroBlaze
core, Centralized DMA controller, I²C, and S/PDIF cores. The MOST NIC transmits and receives syn-
chronous, asynchronous, and control messages to and from the MOST network. Data is organized on a
logical channel basis and transferred between system buffers using the 32-bit OPB bus.
Synchronous data is sinked and sourced from external multimedia devices through the S/PDIF core.
Control data is transferred to and from external devices through the I²C core. Routing of data between
system memory, the MOST NIC, S/PDIF and I²C cores is managed by the Centralized DMA controller.
Figure Top x-ref 3
MicroBlaze
S/PDIF
DMA
int
MM_REG
I2C
TX_BUF RX_BUF
TX_MAC RX_MAC
FOT
FOR
Figure 3: Standalone MOST NIC
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DS543 September 19, 2008