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XC5VLX30-1FF676I Datasheet, PDF (20/91 Pages) Xilinx, Inc – Virtex-5 FPGA DC Characteristics
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Table 39: GTX_DUAL Tile Quiescent Supply Current
Symbol
Description
Typ(1)
Max
Units
IAVTTTXQ
IAVCCPLLQ
IAVTTRXQ
Quiescent MGTAVTTTX (transmitter termination) supply current
Quiescent MGTAVCCPLL (PLL) supply current
Quiescent MGTAVTTRX (receiver termination) supply current. Includes
MGTAVTTRXCQ.
8.2
21.6
mA
0.8
4.8
mA
1.2
12.0
mA
IAVCCQ Quiescent MGTAVCC (analog) supply current
9.0
50.4
mA
Notes:
1. Typical values are specified at nominal voltage, 25°C.
2. Device powered and unconfigured.
3. Currents for conditions other than values specified in this table can be obtained by using the XPOWER Estimator (XPE) or XPOWER
Analyzer (XPA) tools.
4. GTX_DUAL tile quiescent supply current for an entire device can be calculated by multiplying the values in this table by the number of
available GTX_DUAL tiles in the target TXT or FXT device.
GTX_DUAL Tile DC Input and Output Levels
Table 40 summarizes the DC output specifications of the GTX_DUAL tiles in Virtex-5 FPGAs. Figure 6 shows the single-
ended output voltage swing. Figure 7 shows the peak-to-peak differential output voltage.
Consult UG198:Virtex-5 FPGA RocketIO GTX Transceiver User Guide for further details.
Table 40: GTX_DUAL Tile DC Specifications
Symbol
DC Parameter
Conditions
Min Typ
Max
Units
DVPPIN
Differential peak-to-peak input External AC coupled ≤ 4.25 Gb/s 125
voltage
External AC coupled > 4.25 Gb/s 125
1800
mV
1800
mV
VIN
Absolute input voltage
DC coupled
MGTAVTTRX = 1.2V
–400
MGTAVTTRX +400 mV
up to 1320
VCMIN
Common mode input voltage DC coupled
MGTAVTTRX = 1.2V
800
mV
DVPPOUT
Differential peak-to-peak output TXBUFDIFFCTRL = 111
voltage(1)
1400
mV
VSEOUT
Single-ended output voltage
swing(1)
TXBUFDIFFCTRL = 111
700
mV
VCMOUT
Common mode output voltage Equation based
MGTAVTTTX = 1.2V
1200 – DVPPOUT/2
mV
RIN
ROUT
TOSKEW
CEXT
Differential input resistance
Differential output resistance
Transmitter output skew
Recommended external AC coupling capacitor(2)
85
100
120
Ω
85
100
120
Ω
2
8
ps
75
100
200
nF
Notes:
1. The output swing and preemphasis levels are programmable using the attributes discussed in UG198:Virtex-5 FPGA RocketIO GTX
Transceiver User Guide and can result in values lower than reported in this table.
2. Values outside of this range can be used as appropriate to conform to specific protocols and standards.
X-Ref Target - Figure 6
+V
P
N
0
Figure 6: Single-Ended Output Voltage Swing
VSEOUT
ds202_01_051607
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
20