TH58NS100DC Datasheet, PDF (26/43 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 1 - GBIT (128M X 8 BITS) CMOS NAND E2PROM ( 128M BYTE SmartMediaTM )

TH58NS100DC
Auto Page Program
The device carries out an Automatic Page Program operation when it receives a “10H” Program command
after the address and data have been input. The sequence of command, address and data input is shown below.
(Refer to the detailed timing chart.)
80
10
Data input Address Data input Program
command input 0 to 527 command
70
Status Read
command
Pass
I/O
Fail
RY/BY
RY/BY automatically returns to Ready after
completion of the operation.
Data input
Program
Reading & verification
Selected
page
Figure 7. Auto Page Program operation
The data is transferred (programmed) from the register to the selected
page on the rising edge of WE following input of the “10H” command.
After programming, the programmed data is transferred back to the
register to be automatically verified by the device. If the programming
does not succeed, the Program/Verify operation is repeated by the
device until success is achieved or until the maximum loop number set in
the device is reached.
Auto Block Erase
The Auto Block Erase operation starts on the rising edge of WE after the Erase Start command “D0H”
which follows the Erase Setup command “80H”. This two-cycle process for Erase operations acts as an ertra
layer of protection from aceidental erasure of data due to external noise. The device automatically executes the
Erase and Verify operations.
60
D0
Block Address Erase Start
input: 3 cycles command
RY/BY
Busy
70
Status Read
command
Pass
I/O
Fail
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