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TCA5013 Datasheet, PDF (9/68 Pages) Texas Instruments – Feature Rich Smartcard Interface IC
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TCA5013
SCPS253B – JANUARY 2014 – REVISED JANUARY 2016
Electrical Characteristics—Card Interface IO, C4 and C8 (continued)
VDD = VDDI = 3.3 V; LVDD = 10 µH; CVDD = 10 µF; CVUP = 10 µF; TA = –40°C to 85°C unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN TYP
VCC= 3 V;
IO fall time register setting = 01b
VOL - IO, 3 V
Output Low Voltage
VCC= 3 V;
IO fall time register setting = 10b
IOL= -1 mA
VCC= 3 V;
IO fall time register setting = 11b
VCC= 3 V;
IO fall time register setting = 00b
VOL - IO, 3 V, 500uA Output Low Voltage
VCC= 3 V;
IO fall time register setting = 01b
VCC= 3 V;
IO fall time register setting = 10b
IOL= -500
µA
VCC= 3 V;
IO fall time register setting = 11b
VOL - IO, 1.8 V
Output Low Voltage
VCC= 1.8 V;
IO fall time register setting = 11b
IOL= -1 mA
VCC= 1.8 V;
IO fall time register setting = 01b
VOL - IO, 1.8 V, 500uA Output Low Voltage
VCC= 1.8 V;
IO fall time register setting = 10b
IOL= -500
µA
VCC= 1.8 V;
IO fall time register setting = 11b
tPD - R - IOMC - IO
Rising edge
propagation delay
From IOMC pin to card IO; CL on card IO = 30 pF;
CL on IOMC = 30 pF; Prop delay measured from
70% VDDI to 70% of VCC for rising edge
tPD - F - IOMC - IO
Falling edge
propagation delay
From IOMC pin to card IO; CL on card IO = 30 pF;
CL on IOMC = 30 pF; Prop delay measured from
30% VDDI to 30% of VCC for falling edge;
tFO - IO
IO Line output fall time
CL = 30 pF ; 10% to 90%; IO fall time register setting
= 00b
68
tRO - IO
IO Line output rise time
CL = 30 pF ; 10% to 90%; IO rise time register
setting = 100b
100
tRO - C4, C8
C4, C8 Line output rise
time
CL = 30 pF ; 10% to 90%
tFO - C4, C8
C4, C8 Line output fall
time
CL = 30 pF ; 90% to 10%
tRI - IO, C4, C8
IO, C4, C8 Input rise
time
10% to 90%
tFI - IO, C4, C8
IO, C4, C8 Input fall
time
90% to 10%
CI - IO, C4, C8
RPU - IO, C4, C8
Input capacitance
Pull-up resistance
F = 1 MHz
IO, C4, C8 pull-up to VCC
4.25
MAX UNIT
0.3
0.3 V
0.3
0.3
0.3
V
0.3
0.3
0.18 V
0.18
0.18 V
0.18
400 ns
250 ns
ns
ns
1.2 µs
1.2 µs
1.2 µs
1.2 µs
10 pF
8.1 kΩ
6.10 Electrical Characteristics—PRES
VDD = VDDI = 3.3 V; LVDD = 10 µH; CVDD = 10 µF; CVUP = 10 µF; TA = –40°C to 85°C unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
VIL - PRES
VIH - PRES
ILEAK - PRES
tDEB(P)
tDEB(D)
Input Low voltage
Input high voltage
Input leakage current
Debounce time
Voltage on pin = VDDI
Time from transition on PRES pin to PRESL bit being
set
Time from transition on PRES pin to start of
deactivation sequence (RST going low)
0.7 VDDI
0.3 VDDI
1
20
100
UNIT
V
V
µA
ms
µs
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