TCA5013 Datasheet, PDF (57/68 Pages) Texas Instruments – Feature Rich Smartcard Interface IC

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TCA5013
SCPS253B – JANUARY 2014 – REVISED JANUARY 2016
Typical Application (continued)
9.2.1 Design Requirements
For this design example shown below, Table 12 shows the input parameters.
Table 12. Design Parameters
DESIGN PARAMETER
V_DD input Voltage range
V_DDI input Voltage range
V_CC output Voltage range
Sum of all ICC currents
V_CC output ripple voltage
Max load transient supported on
V_CC
EXAMPLE VALUE
2.7 V to 4.2 V
2.7 V to 4.2 V
1.8 V, 3 V, 5 V
180 mA (max)
90 mV (max)
As defined in the Electrical
Characteristics—Card V_CC
9.2.2 Detailed Design Procedure
9.2.2.1 IO Pin Fall Time Setting
The V_OL on the IO pin depends on the IO fall time setting shown in Table 7. It also shows the different IO fall time
settings that are usable for different V_CC voltage. Care should be taken to select a register setting such that V_OL
meets the system requirements.
9.2.2.2 CLK Pin Rise Time And Fall Time Settings
Electrical Characteristics—Card CLK shows the typical rise and fall time of the clock signal for a 30 pF load.
Because most applications will not have a typical 30 pF load, the rise and fall time of the clock signal will need to
be calibrated for the board. EMV 4.3 specifies that the rise/fall time on the clock signal shall not be more than 8%
of the clock period. It is recommended that the slowest fall time setting that meets the EMV requirement be
selected. For systems where multiple clock frequencies will be used, it is recommended that a different fall time
setting be used for each clock frequency.
9.2.3 Application Curves
350
300
250
200
150
100
50
0
0
REG 07H Bit [4:3] 00
REG 07H Bit [4:3] 01
REG 07H Bit [4:3] 10
REG 07H Bit [4:3] 11
200
400
600
800 1000 1200
I_OL ( A)
C002
Figure 27. V_OL vs I_OL for User Card
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