DS90UR916Q_13 Datasheet, PDF (7/45 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

DS90UR916Q
www.ti.com
SNOSB46E – MARCH 2011 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings⁽¹⁾⁽²⁾
Supply Voltage – V_DDn (1.8V)
Supply Voltage – V_DDIO
LVCMOS I/O Voltage
Receiver Input Voltage
Junction Temperature
Storage Temperature
60L WQFN Package
Maximum Power Dissipation Capacity at
25°C 470mW
Derate above 25C
ESD Rating (HBM)
θ_JA(based on 9 thermal vias)
θ_JC(based on 9 thermal vias)
ESD Rating (CDM)
ESD Rating (MM)
ESD Rating (ISO10605), R_D = 2kΩ, C_S = 150pF or R_D = 2kΩ, C_S = 330pF or R_D = 330Ω, C_S = 150pF
Air Discharge (R_IN+, R_IN−)
Contact Discharge (R_IN+, R_IN−)
ESD Rating (ISO10605), R_D = 330Ω, C_S = 330pF
Air Discharge (R_IN+, R_IN−)
Contact Discharge (R_IN+, R_IN−)
ESD Rating (IEC 61000–4–2), R_D = 330Ω, C_S = 150pF
Air Discharge (R_IN+, R_IN−)
Contact Discharge (R_IN+, R_IN−)
For soldering specifications see product folder at www.ti.com and SNOA549
−0.3V to +2.5V
−0.3V to +4.0V
−0.3V to +(VDDIO + 0.3V)
−0.3V to (VDD + 0.3V)
+150°C
−65°C to +150°C
470mW
1/θ_JA mW / °C
24.6 °C/W
2.8 °C/W
≥±8 kV
≥±1 kV
≥±250 V
≥±30 kV
≥±10 kV
≥±15 kV
≥±10 kV
≥±25 kV
≥±10 kV
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Recommended Operating Conditions
Min
Nom
Max
Units
Supply Voltage (V_DDn)
LVCMOS Supply Voltage (V_DDIO)
OR
1.71
1.8
1.89
V
1.71
1.8
1.89
V
LVCMOS Supply Voltage (V_DDIO)
Operating Free Air Temperature (T_A)
PCLK Clock Frequency
Supply Noise⁽¹⁾
3.0
3.3
3.6
V
−40
+25
+105
°C
5
65
MHz
50
mV_P-P
(1) Supply noise testing was done with minimum capacitors on the PCB. A sinusoidal signal is AC coupled to the V_DDn (1.8V) supply with
amplitude = 100 mVp-p measured at the device V_DDn pins. Bit error rate testing of input to the Ser and output of the Des with 10 meter
cable shows no error when the noise frequency on the Ser is less than 750 kHz. The Des on the other hand shows no error when the
noise frequency is less than 400 kHz.
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