DS90UR916Q_13 Datasheet, PDF (31/45 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

DS90UR916Q
www.ti.com
SNOSB46E – MARCH 2011 – REVISED APRIL 2013
PAGE
0
0
0
ADD
(dec)
0
1
2
Table 10. DESERIALIZER — Serial Bus Control Registers
ADD
(hex)
Register Name
Bit(s)
R/W
Default
(bin)
Function
0 Des Config 1
7
R/W
0
LFMODE
6
R/W
0
OS_PCLK
5
R/W
0
OS_DATA
4
R/W
0
RFB
3:2 R/W
00 CONFIG
1
R/W
0
SLEEP
1 Slave ID
0
R/W
0
REG Control
7
R/W
0
6:0 R/W 1110000 ID[X]
2 Des Features 1
7
R/W
0
OP_LOW
Release/Set
6
R/W
0
OSS_SEL
5:4 R/W
00 MAP_SEL
3
R/W
2:0 R/W
0
OP_LOW strap
bypass
00 OSC_SEL
Description
0: 20 to 65 MHz Operation
1: 5 to 20 MHz Operation
0: Normal PCLK Output Slew
1: Increased PCLK Slew
0: Normal DATA OUTPUT Slew
1: Increased Data Slew
0: Data strobed on Falling edge of PCLK
1: Data strobed on Rising edge of PCLK
00: Normal Mode, Control Signal Filter
Disabled
01: Normal Mode, Control Signal Filter
Enabled
10: Backwards Compatible (DS90UR241)
11: Backwards Compatible (DS90C241)
Note – not the same function as
PowerDown (PDB)
0: normal mode
1: Sleep Mode – Register settings
retained.
0: Configurations set from control pins /
STRAP pins
1: Configurations set from registers (except
I2C_ID)
0: Address from ID[X] Pin
1: Address from Register
Serial Bus Device ID, Four IDs are:
7b '1110 001 (h'71)
7b '1110 010 (h'72)
7b '1110 011 (h'73)
7b '1110 110 (h'76)
All other addresses are Reserved.
0: set outputs state LOW (except LOCK)
1: release output LOW state, outputs
toggling normally
Note: This register only works during LOCK
= 1.
Output Sleep State Select
0:PCLK/RGB[7:0]/HS/VS/DE = L, LOCK =
Normal, PASS = H
1:PCLK/RGB[7:0]/HS/VS/DE = Tri-State,
LOCK = Normal, PASS = H
Special for Backwards Compatible Mode
with DS90UR241)
00: bit 4, 5 on LSB
01: LSB zero or one
10: LSB zero
11: LSB zero
0: strap will determine whether OP_LOW
feature is ON or OFF
1: Turns OFF OP_LOW feature
000: OFF
001: 50 MHz ±40%
010: 25 MHz ±40%
011: 16.7 MHz ±40%
100: 12.5 MHz ±40%
101: 10 MHz ±40%
110: 8.3 MHz ±40%
111: 6.3 MHz ±40%
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: DS90UR916Q
Submit Documentation Feedback
31