DS90UR916Q_13 Datasheet, PDF (12/45 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

DS90UR916Q
SNOSB46E – MARCH 2011 – REVISED APRIL 2013
AC Timing Diagrams and Test Circuits
PCLK
w/ RFB = L
V_DDIO
GND
RGB[n] (odd),
VS, HS
RGB[n] (even),
DE
Figure 4. Checkerboard Data Pattern
V_DDIO
GND
V_DDIO
GND
80%
V_DDIO
t_CLH
20%
t_CHL
GND
Figure 5. Deserializer LVCMOS Transition Times
RIN
(Diff.)
PCLK
(RFB = L)
START
BIT
012
SYMBOL N
STOP START
BIT BIT
STOP
BIT
23
012
23
SYMBOL N+1
t_DD
RGB[7:0],
HS, VS, DE
SYMBOL N-2
SYMBOL N-1
Figure 6. Deserializer Delay – Latency
SYMBOL N
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PDB
1/2 V_DDIO
RIN
(Diff.)
active
"X"
PCLK,
RGB[7:0],
DE, HS, VS,
PASS, LOCK
t_XZR
active
Z (TRI-STATE)
Figure 7. Deserializer Disable Time (OSS_SEL = 0)
12
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