TI380C25 Datasheet, PDF (67/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

SIF Inputs:
SBCLK
SIF Master
T2
T3
Bus Exchange
T4
I1
I2
User
T1
SBGR
SDTACK
SIF Outputs:
230
SBRQ ^†
SAS, SUDS,
SLDS
SRNW
SADH0 – SADH7,
SADL0 – SADL7,
SPH, SPL
SDDIR
Read
Write
SIF
Write
Read
220
240
223b
220
224d
240
Hi-Z
Hi-Z
224b
SOWN
† _{In 80x8x mode, the system interface deasserts SHRQ on the rising edge of SBCLK following the T4 state of the last system bus transfer it controls. In 68xxx mode, the system interface}
deasserts SBRQ on the rising edge of SBCLK in state T2 of the first system bus transfer it controls.
Figure 29. 68xxx-Mode Bus-Arbitration Timing, SIF Returns Control