TI380C25 Datasheet, PDF (13/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

TI380C25
TOKEN-RING COMMPROCESSOR
SPWS012 – JANUARY 1995
PIN
NAME
NO.
I / O^†
Pin Functions (Continued)
DESCRIPTION
Intel Mode
S8 is used for system 8 / 16-bit bus select. S8 selects the bus width used for
communications through the system interface. On the rising edge of SRESET, the
TI380C25 latches the DMA bus width; otherwise, the value on S8 dynamically selects
the DIO bus width.
S8 / SHALT
51
I
H = Selects 8-bit mode (see Note 1)
L = Selects 16-bit mode
Motorola
Mode
SHALT is used for system halt / bus error retry. If SHALT is asserted along with SBERR,
the adapter retries the last DMA cycle. This is the rerun operation as defined in the 68xxx
specification. The BERETRY counter is not decremented by SBERR when SHALT is
asserted ( see Section 3.4.5.3 of the TMS380 Second-Generation Token Ring User’s
Guide (SPWU005) for more information).
VDDL
37
55
126
I
Positive-supply voltage for digital logic. All VDDL pins must be attached to the common-system
power-supply plane.
VDD
9
34
72
89
I
Positive-supply voltage for output buffers. All VDD pins must be attached to the common-system
power-supply plane.
106
137
VSSC
39
87
117
I
Ground reference for output buffers (clean ground). All VSSC pins must be attached to the
common-system ground plane.
144
VSSL
2
52
53
73
36
I
Ground reference for digital logic. All VSSL pins must be attached to the common-system ground plane.
108
128
129
VSS
11
19
62
I
Ground connections for output buffers. All VSS pins must be attached to system ground plane.
91
134
1
10
35
NC
71
88
These pins should be left unconnected.
90
107
109
† _{I = input, O = output}
NOTE 1: Pin has an internal pullup device to maintain a high-voltage level when left unconnected (no etch).
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