TI380C25 Datasheet, PDF (51/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

T4
TX
SBCLK
TWAIT
T1
T2
V
T3
T4
T1
212
SBHE ^†
Valid
SRD
SWR
SXAL
SALE
SADL0 –
SADH7,
SADH0 –
SADL7,
SPH, SPL ^‡
SRDY
SDBEN
216
217
227W
High
217
223W
216
216a
233
212
218
212
233
Address
218
219
221
Output Data
Extended Address
208a
237W
208b
225WH
225W
SDDIR
High
† _{In 8-bit 80x8x mode, SBHE / SRNW is a don’t care input during DIO and an inactive (high) output during DMA.}
‡ _{In 8-bit 80x8x mode, the most significant byte of the address is maintained on SADH for T2, T3, and T4. The address is maintained according to parameter 21; i.e., held after T4 high.}
Figure 20. 80x8x-Mode DMA Write-Cycle Timing