TI380C25 Datasheet, PDF (65/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

SBCLK
SAS
SUDS,
SLDS
SRNW
SXAL
SALE
SADL0 – SADH7,
SADH0 – SADL7,
SPL, SPH
SDTACK ^†‡
T4
TX
TWAIT
V
T1
T2
T3
216
Low
222
211
233a
218
211a
217
217
218
216
223W
212
212
233
Extended Address
233
Address
219
Output Data
208a
T4
T1
209
216a
221
SDDIR
237W
208b
225W
225WH
SDBEN
† _{All VSS pins should be routed to minimize inductance to system ground.}
‡ _{On a read cycle, the read strobe remains active until the internal sample of incoming data is completed. Input data can be removed when either the read strobe or SDBEN becomes}
no longer active.
Figure 28. 68xxx-Mode DMA Write-Cycle Timing