TI380C25 Datasheet, PDF (59/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

TI380C25
TOKEN-RING COMMPROCESSOR
SCS, SRSX,
SRS0, SRS1,
SBHE
SIACK
SRNW
SLDS
Only SCS needs to be Inactive.
All others are don’t care.
267
272a
SPWS012 – JANUARY 1995
286
273a
SDDIR
High
282R
283R
286
279
SDBEN
276
275
282a
SDTACK ^†
Hi-Z
255
Hi-Z
SADH0 – SADH7,
SADL0 – SADL7,
SPH, SPL ^‡
259
Hi-Z
260
Output Data Valid
261
261a
Hi-Z
† _{SDTACK is an active-low bus ready signal. It must be asserted before data output.}
‡ _{Internal logic drives SDTACK high and verifies that it has reached a valid high level before making it a 3-state signal.}
Figure 25. 68xxx Interrupt-Acknowledge-Cycle Timing
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