TI380C25 Datasheet, PDF (57/71 Pages) Texas Instruments – TOKEN-RING COMMPROCESSOR

TI380C25
TOKEN-RING COMMPROCESSOR
SCS SRSX,
SRS0, SRS1
SIACK
SRNW
SUDS,
SLDS ^†
267
272
272a
Valid
280
SPWS012 – JANUARY 1995
268
273a
273
286 ^†
273a
SDDIR
High
SDBEN ^‡
282W
283W
SDTACK ^§
276
Hi-Z
279
275
255
Hi-Z
282b
263
262
SADH0 – SADH7,
SADL0 – SADL7,
Hi-Z
SPH, SPL
Data
Hi-Z
† _{For 68xxx mode, skew between SLDS and SUDS must not exceed 10 ns. Provided this limitation is observed, all events referenced to a data}
strobe edge use the later occurring edge. Events defined by two data strobes edges, such as parameter 286, are measured between latest and
earlier edges.
‡ _{When the TMS380C25 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met to the input}
of the data buffers.
§ _{SDTACK is an active-low bus ready signal. It must be asserted before data output.}
Figure 24. 68xxx DIO Write-Cycle Timing
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