DRV8320_17 Datasheet, PDF (63/89 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3A – FEBRUARY 2017 – REVISED APRIL 2017
R ^VO
A_V u I
P_SENSE ! I_RMS2 u R
(20)
From Equation 19 and Equation 20, select a target gain setting based on the power rating of the target sense
resistor.
9.2.1.2.4.1 Example
In this system example, the value of VREF voltage is 3.3 V with a sense current from –40 to +40 A. The linear
range of the SOx output is 0.25 V to V_VREF – 0.25 V (from the V_LINEAR specification). The differential range of the
sense amplifier input is –0.3 to +0.3 V (V_DIFF).
V_O
3.3 V 0.25 V
3.3 V _{1.4 V}
2
(21)
R
1.4 V
2 W ! 28.3² u R o R 2.5 m:
A_V u 40 A
(22)
2.5
m:
!
1.4 V
A_V u 40
A
o
A_V
! 14
(23)
Therefore, the gain setting must be selected as 20 V/V or 40 V/V and the value of the sense resistor must be
less than 2.5 mΩ to meet the power requirement for the sense resistor. For this example, the gain setting was
selected as 20 V/V. The value of the resistor and worst case current can be verified that R < 2.5 mΩ and I_max =
40 A does not violate the differential range specification of the sense amplifier input (V_SPxD).
9.2.1.2.5 Buck Regulator Configuration (DRV8320R and DRV8323R)
For a detailed design procedure and information on selecting the proper buck regulator external components,
refer to LMR16006 SIMPLE SWITCHER® 60 V 0.6 A Buck Regulators With High Efficiency Eco-mode.
9.2.1.3 Application Curves
Figure 52. Gate-Drive 20% Duty Cycle
Figure 53. Gate-Drive 80% Duty Cycle
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