DRV8320_17 Datasheet, PDF (14/89 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3A – FEBRUARY 2017 – REVISED APRIL 2017
Electrical Characteristics (continued)
at T_A = –40°C to +125°C, V_VM = 6 to 60 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V_BIAS
I_BIAS
V_SLEW ⁽¹⁾
I_VREF
UGB ⁽¹⁾
SOx output voltage ^{SPI Device}
bias
H/W Device
SPx/SNx input bias current
V_SP = V_SN = 0 V, CAL = 3.3 V, VREF_DIV = 0b
V_SP = V_SN = 0 V, CAL = 3.3 V, VREF_DIV = 1b
V_SP = V_SN = 0 V, CAL = 3.3 V
VREF_DIV = 1b
SOx output slew rate
60-pF load
VREF input current
Unity gain bandwidth
V_VREF = 5 V
60-pF load
PROTECTION CIRCUITS
V_UVLO
VM undervoltage lockout
VM falling, UVLO report
VM rising, UVLO recovery
V_{UVLO_HYS}
t_{UVLO_DEG}
V_CPUV
VM undervoltage hysteresis
VM undervoltage deglitch time
Charge pump undervoltage
lockout
Rising to falling threshold
VM falling, UVLO report
VCP falling, CPUV report
V_{GS_CLAMP}
High-side gate clamp
Positive clamping voltage
Negative clamping voltage
VDS_LVL = 0000b
VDS_LVL = 0001b
VDS_LVL = 0010b
VDS_LVL = 0011b
VDS_LVL = 0100b
VDS_LVL = 0101b
VDS_LVL = 0110b
VDS_LVL = 0111b
SPI Device
VDS_LVL = 1000b
VDS_LVL = 1001b
V_{VDS_OCP}
V_DS overcurrent
trip voltage
VDS_LVL = 1010b
VDS_LVL = 1011b
VDS_LVL = 1100b
VDS_LVL = 1101b
VDS_LVL = 1110b
VDS_LVL = 1111b
VDS = Tied to AGND
VDS = 18 kΩ ± 5% tied to AGND
VDS = 75 kΩ ± 5% tied to AGND
H/W Device VDS = Hi-Z
VDS = 75 kΩ ± 5% tied to DVDD
VDS = 18 kΩ ± 5% tied to DVDD
VDS = Tied to DVDD
OCP_DEG = 00b
t_{OCP_DEG}
V_DS and V_SENSE
overcurrent
deglitch time
SPI Device
OCP_DEG = 01b
OCP_DEG = 10b
OCP_DEG = 11b
H/W Device
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MIN TYP MAX
V_VREF – 0.3
V_VREF / 2
V_VREF / 2
100
10
2
3
1
UNIT
V
µA
V/µs
mA
MHz
5.4 5.6
5.6 5.8
200
10
5.8
V
6
mV
µs
V_VM + 2.8
V
15 16.5
–0.7
18
V
0.06
0.13
0.2
0.26
0.31
0.45
0.53
0.6
0.68
0.75
0.94
1.13
V
1.3
1.5
1.7
1.88
0.06
0.13
0.26
0.6
1.13
1.88
Disabled
2
4
6
µs
8
4
14
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