DRV8320_17 Datasheet, PDF (37/89 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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VM
REF +
±
DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3A – FEBRUARY 2017 – REVISED APRIL 2017
DVDD 3.3 V, 30 mA
AGND
0.1 …F
Figure 30. DVDD Linear Regulator Block Diagram
Use Equation 1 to calculate the power dissipated in the device because of the DVDD linear regulator.
P V_VM V_DVDD u I_DVDD
(1)
For example, at V_VM = 24 V, drawing 20 mA out of DVDD results in a power dissipation as shown in Equation 2.
P 24 V 3.3 V u 20 mA 414 mW
(2)
8.3.3 Pin Diagrams
Figure 31 shows the input structure for the logic-level pins, INHx, INLx, CAL, ENABLE, nSCS, SCLK, and SDI.
The input can be driven with a voltage or external resistor.
STATE
RESISTANCE
DVDD
VIH
Tied to DVDD
VIL
Tied to AGND
100 k
INPUT
Logic High
Logic Low
Figure 31. Logic-Level Input Pin Structure
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