TLC34076_16 Datasheet, PDF (61/69 Pages) Texas Instruments – Video Interface Palette

Appendix B
Printed Circuit Board Layout Considerations
Printed Circuit Board (PCB) Considerations
A four-layer printed-circuit board (PCB) should be used with the TLC34076, one layer each for 5-V power
and GND and two layers for signals. The layout should be optimized for the lowest possible noise on the
TLC34076 power and ground lines by shielding the digital inputs and providing good decoupling. The lead
length between groups of V_DD and GND terminals should be minimized so as to reduce inductive ringing.
The terminal assignments for the TLC34076 P0 – P31 inputs were selected for minimum interconnect
lengths between these inputs and the VRAM pixel data outputs. The TLC34076 should be located as close
to the output connectors as possible to minimize noise pickup and reflections due to impedance
mismatching.
Ground Plane
A single ground plane is recommended for both the TLC34076 and the rest of the logic. Separate digital and
analog ground planes are not needed.
Power Plane
Split power planes are recommended for the TLC34076 and the rest of the logic. The TLC34076 and its
associated analog circuitry should have their own power plane, referred to as AV_CC in Figure B –1. The two
power planes should be connected at a single point through a ferrite bead as shown in Figures B –1, B –2,
and B –3. This bead should be located within 3 inches of the TLC34076.
Supply Decoupling
Bypass capacitors should be installed using the shortest leads possible, being consistent with reliable
operation to reduce the lead inductance.
For the best performance, a 0.1-µF ceramic capacitor in parallel with a 0.01-µF chip capacitor should be
used to decouple each of the three groups of power terminals to GND. These capacitors should be placed
as close as possible to the device as shown in Figure B –2.
When a switching power supply is used, the designer should pay close attention to reducing power supply
noise and should consider using a 3-terminal voltage regulator for supplying power to AV_CC.
COMP and V_REF Terminals
A 100-Ω resistor (optional) and 0.1-µF ceramic capacitor (approximate values) should be connected in
series between the device COMP and V_DD terminals in order to avoid noise and color-smearing problems.
Also, whether an internal or external voltage reference is used, a 0.1-µF capacitor should be connected
between the device V_REF and GND terminals to further stabilize the video image. The resistor and capacitor
values may vary depending on the board layout; experimentation may be required in order to determine
optimum values.
B–1