TLC34076_16 Datasheet, PDF (33/69 Pages) Texas Instruments – Video Interface Palette

2.5.4 VGA Pass-Through Mode Default Conditions
The value contained in each register after hardware or software reset is shown in Table 2–9.
Table 2–9. VGA Pass-Through Mode Default Conditions
REGISTER NAME
Mux control register
Input clock selection register
Output clock selection register
Palette page register
General control register
Pixel read mask register
Palette address register
Palette holding register
Test register
DEFAULT VALUE
2Dh
00h
3Fh
00h
03h
FFh
xxh
xxh
(Pointing to color palette red value)
2.6 Analog Output Specifications
The DAC outputs are controlled by current sources (three for IOG and two each for IOR and IOB) as shown
in Figure 2– 6. In the normal case, there is a 7.5-IRE (Institute of Radio Engineers: predecessor to the IEEE)
difference between Blank and Black levels, which is shown in Figure 2–7. When a 0-IRE pedestal is desired,
it can be selected by resetting bit 4 of the general control register (see subsection 2.11.3). The video output
for a 0-IRE pedestal is shown in Figure 2–8.
NOTE:
For a 75-Ω doubly terminated load, the V_REF = 1.235 V, R_SET = 523 Ω, RS-343A
levels and tolerances in recommended operating conditions are assumed.
VAA
IOG
SYNC
(IOG Only)
BLANK
G0 – G7
∼ 15 pF
RL
Figure 2–6. Equivalent Circuit of the IOG Current Output
2–17