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SMJ320C6701-SP Datasheet, PDF (56/60 Pages) Texas Instruments – RAD-TOLERANT CLASS-V FLOATING-POINT DIGITAL SIGNAL PROCESSOR
SMJ320C6701-SP
SGUS030E – APRIL 2000 – REVISED JULY 2009 ............................................................................................................................................................ www.ti.com
Timing Requirements for JTAG Test Port (continued)
(see Figure 40)
NO.
1
3
4
tc(TCK)
tsu(TDIV–TCKH)
th(TCKH–TDIV)
Cycle time, TCK
Setup time, TDI/TMS/TRST valid before TCK high
Hold time, TDI/TMS/TRST valid after TCK high
MIN
35
10
9
MAX
UNIT
ns
ns
ns
Switching Characteristics for JTAG Test Port
(see Figure 40)
NO.
2
td(TCKL–TDOV)
PARAMETER
Delay time, TCK low to TDO valid
(1) This parameter is not tested.
MIN
–3 (1)
MAX
15 (1)
UNIT
ns
TCK
TDO
TDI/TMS/TRST
1
2
2
4
3
Figure 40. JTAG Test-Port Timing
56
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