SMJ320C6701-SP Datasheet, PDF (12/60 Pages) Texas Instruments – RAD-TOLERANT CLASS-V FLOATING-POINT DIGITAL SIGNAL PROCESSOR

SMJ320C6701-SP
SGUS030E – APRIL 2000 – REVISED JULY 2009 ............................................................................................................................................................ www.ti.com
NAME
SSADS
SSOE
SSWE
SSCLK
SDA10
SDRAS
SDCAS
SDWE
SDCLK
HOLD
HOLDA
TOUT1
TINP1
TOUT0
TINP0
DMAC3
DMAC2
DMAC1
DMAC0
CLKS1
CLKR1
CLKX1
DR1
DX1
FSR1
FSX1
SIGNAL
NO.
V8
W7
Y7
AA8
V7
V6
W5
T8
T9
R6
B15
G2
K3
M18
J18
E18
F19
E20
G16
F4
H4
J4
E2
G4
F3
F2
Signal Descriptions (continued)
TYPE ⁽¹⁾
DESCRIPTION
EMIF - SYNCHRONOUS BURST SRAM CONTROL
O/Z
SBSRAM address strobe
O/Z
SBSRAM output enable
O/Z
SBSRAM write enable
O/Z
SBSRAM clock
EMIF - SYNCHRONOUS DRAM CONTROL
O/Z
SDRAM address 10 (separate for deactivate command)
O/Z
SDRAM row address strobe
O/Z
SDRAM column address strobe
O/Z
SDRAM write enable
O/Z
SDRAM clock
EMIF - BUS ARBITRATION
I
Hold request from the host
O
Hold request acknowledge to the host
TIMERS
O/Z
Timer 1 or general-purpose output
I
Timer 1 or general-purpose input
O/Z
Timer 0 or general-purpose output
I
Timer 0 or general-purpose input
DMA ACTION COMPLETE
O
DMA action complete
MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1)
I
External clock source (as opposed to internal)
I/O/Z
Receive clock
I/O/Z
Transmit clock
I
Receive data
O/Z
Transmit data
I/O/Z
Receive frame sync
I/O/Z
Transmit frame sync
12
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