DS125MB203_15 Datasheet, PDF (41/54 Pages) Texas Instruments – Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer

www.ti.com
9.2 Typical Application
SEL0
EXPANDER
RX
TX
EXPANDER
RX
TX
DS125MB203
SNLS432C – OCTOBER 2012 – REVISED DECEMBER 2015
MB203
D_OUT0
S_INA0
S_INB0
D_OUT1
S_INA1
S_INA1
D_IN0
S_OUTA0
S_OUTB0
DRIVE 0
TXA_0
DRIVE 1
TXB_0
TXA_1
TXB_1
RXA_0
RXB_0
D_IN1
S_OUTA1
S_OUTB1
RXA_1
RXB_1
SEL1
Figure 10. Storage Application
9.2.1 Design Requirements
As with any high-speed design, there are many factors which influence the overall performance. Below are a list
of critical areas for consideration and study during design:
• Use 100-Ω impedance traces. Generally these are very loosely coupled to ease routing length differences.
• Place AC-coupling capacitors near to the receiver end of each channel segment to minimize reflections.
• The maximum body size for AC-coupling capacitors is 0402.
• Back-drill connector vias and signal vias to minimize stub length.
• Use Reference plane vias to ensure a low inductance path for the return current.
9.2.2 Detailed Design Procedure
The DS125MB203 is designed to be placed at an offset location with respect to the overall channel attenuation.
To optimize performance, the repeater requires tuning to extend the reach of the cable or trace length while also
recovering a solid eye opening. To tune the mux-buffer, the settings mentioned in Table 2 and Table 3 are
recommended as a default starting point for most applications. Once these settings are configured, additional
tuning of the EQ and, to a lesser extent, VOD may be required to optimize the repeater performance for each
specific application environment.
Examples of the repeater performance as a generic high-speed datapath repeater are shown in the performance
curves in the Application Curves section.
Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: DS125MB203
Submit Documentation Feedback
41