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DS125MB203_15 Datasheet, PDF (24/54 Pages) Texas Instruments – Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer
DS125MB203
SNLS432C – OCTOBER 2012 – REVISED DECEMBER 2015
www.ti.com
ADDRESS
REGISTER
NAME
BIT
7
0x18
6:5
4:3
CH1
D_OUT0 – S_INB0
DEM
2:0
0x19
7
CH1
6:4
D_OUT0 – S_INB0
Reserved
3:2
1:0
0x1A-0x1B
Reserved
7:0
7:6
5:4
0x1C
CH2
NC – S_INA1
RXDET
3:2
0x1D
0x1E
0x1F
1:0
CH2
NC – S_INA1
7:0
EQ
Reserved
7:0
7:3
Reserved
2:0
Table 7. SMBUS Slave Mode Register Map (continued)
FIELD
RXDET Status
Reserved
Reserved
DEM Control
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RXDET
Reserved
TYPE DEFAULT
R
0x02
R/W
R/W
0x00
R/W
0x00
R/W
0x00
EEPROM
REG BIT
Yes
Yes
Yes
Yes
Yes
Yes
DESCRIPTION
Observation bit for RXDET CH1
1 = Input 50 Ω terminated to VDD
0 = Input is Hi-Z
Set bits to 0
Set bits to 0
DEM Control
000'b = 0 dB
001'b = –1.5 dB
010'b = –3.5 dB (default)
011'b = –5 dB
100'b = –6 dB
101'b = –8 dB
110'b = –9 dB
111'b = –12 dB
Set bit to 0
Set bits to 0
Set bits to 0
Set bits to 0
Set bits to 0
Set bits to 0
Set bits to 0
00'b = Input is Hi-Z impedance
01'b = Auto Rx-Detect,
outputs test every 12 ms for 600 ms (50 times) then stops; termination is Hi-
Z until detection; once detected input termination is 50 Ω
10'b = Auto Rx-Detect,
outputs test every 12 ms until detection occurs; termination is Hi-Z until
detection; once detected input termination is 50 Ω
11'b = Input is 50 Ω
Note: Override RXDET pin and enable register control through Reg 0x08[3]
Set bits to 0
EQ Control
R/W
0x2F
Yes
EQ control - total of 256 levels.
See Table 2.
Reserved
R/W
0xAD
Yes
Reserved
R/W
0x02
Yes
24
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