DS125MB203_15 Datasheet, PDF (13/54 Pages) Texas Instruments – Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer

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8 Detailed Description
DS125MB203
SNLS432C – OCTOBER 2012 – REVISED DECEMBER 2015
8.1 Overview
The DS125MB203 is a dual lane 2:1 multiplexer and 1:2 switch or fan-out buffer with signal conditioning. The
DS125MB203 compensates for lossy FR-4 printed-circuit-board backplanes and balanced cables. The
DS125MB203 operates in 3 modes: Pin Control Mode (ENSMB = 0), SMBus Slave Mode (ENSMB = 1) and
SMBus Master Mode (ENSMB = float) to load register information from external EEPROM; refer to SMBUS
Master Mode for additional information.
8.2 Functional Block Diagram
One of Two 2:1 / 1:2 Ports
OUTA_n+
OUTA_n-
Driver
Pre-
driver
D_INn+
D_INn-
ENSMB
EQ_D[1:0]
DEM_D[1:0]
VDD
EQ
EQ
EQ
SEL[1:0]
VDD
VDD
Pre-
driver
Driver
Pre-
driver
Driver
S_INA_n+
S_INA_n-
S_INB_n+
S_INB_n-
S_OUTA_n+
S_OUTA_n-
S_OUTB_n+
S_OUTB_n-
EQ_S[1:0]
DEM_S[1:0]
READ_EN
AD[3:0]
SCL
SDA
RESET
SEL[1:0]
VDD_SEL
VIN
Digital Core and SMBus Registers
Internal voltage
regulator
ALL_DONE
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