DS125MB203_15 Datasheet, PDF (36/54 Pages) Texas Instruments – Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer

DS125MB203
SNLS432C – OCTOBER 2012 – REVISED DECEMBER 2015
www.ti.com
EEPROM ADDRESS
BYTE
BIT 7
Description
Reserved
SMBus Register _0x09 0x10[7]
Default
Value
0xAD
1
Description
Reserved
SMBus Register _0x0A 0x11[2]
Default
Value
0x40
0
Description
Reserved
SMBus Register _0x0B 0x15[5]
Default
Value
0x02
0
Description
CH1_EQ_3
SMBus Register _0x0C 0x16[3]
Default
Value
0xFA
1
Description
Reserved
SMBus Register _0x0D 0x17[3]
Default
Value
0xD4
1
Description
Reserved
SMBus Register _0x0E 0x19[3]
Default
Value
0x00
0
Description
CH2_EQ_7
SMBus Register _0x0F 0x1D[7]
Default
Value
0x2F
0
Description
Reserved
SMBus Register _0x10 0x1E[7]
Default
Value
0xAD
1
Description
Reserved
SMBus Register _0x11 0x1F[2]
Default
Value
0x40
0
Table 8. EEPROM Register Map With Default Value (continued)
BIT 6
Reserved
0x10[6]
0
Reserved
0x11[1]
1
Reserved
0x15[4]
0
CH1_EQ_2
0x16[2]
1
CH1_VOD_2
0x17[2]
1
Reserved
0x19[2]
0
CH2_EQ_6
0x1D[6]
0
Reserved
0x1E[6]
0
Reserved
0x1F[1]
1
BIT 5
Reserved
0x10[5]
1
Reserved
0x11[0]
0
CH1_RXDET_1
0x15[3]
0
CH1_EQ_1
0x16[1]
1
CH1_VOD_1
0x17[1]
0
Reserved
0x19[1]
0
CH2_EQ_5
0x1D[5]
1
Reserved
0x1E[5]
1
Reserved
0x1F[0]
0
BIT 4
Reserved
0x10[4]
0
Reserved
0x12[7]
0
CH1_RXDET_0
0x15[2]
0
CH1_EQ_0
0x16[0]
1
CH1_VOD_0
0x17[0]
1
Reserved
0x19[0]
0
CH2_EQ_4
0x1D[4]
0
Reserved
0x1E[4]
0
Reserved
0x20[7]
0
BIT 3
Reserved
0x10[3]
1
Reserved
0x12[3]
0
CH1_EQ_7
0x16[7]
0
CH1_SCP
0x17[7]
1
CH1_DEM_2
0x18[2]
0
Reserved
0x1C[5]
0
CH2_EQ_3
0x1D[3]
1
Reserved
0x1E[3]
1
Reserved
0x20[3]
0
BIT 2
BIT 1
Reserved
0x10[2]
Reserved
0x10[1]
1
0
Reserved
0x12[2]
Reserved
0x12[1]
0
0
CH1_EQ_6
0x16[6]
CH1_EQ_5
0x16[5]
0
1
CH1_Sel_MODE Reserved
0x17[6]
0x17[5]
0
1
CH1_DEM_1
0x18[1]
CH1_DEM_0
0x18[0]
1
0
Reserved
0x1C[4]
CH2_RXDET_1
0x1C[3]
0
0
CH2_EQ_2
0x1D[2]
CH2_EQ_1
0x1D[1]
1
1
Reserved
0x1E[2]
Reserved
0x1E[1]
1
0
Reserved
0x20[2]
Reserved
0x20[1]
0
0
BIT 0
Reserved
0x10[0]
1
Reserved
0x12[0]
0
CH1_EQ_4
0x16[4]
0
Reserved
0x17[4]
0
Reserved
0x19[7]
0
CH2_RXDET_0
0x1C[2]
0
CH2_EQ_0
0x1D[0]
1
Reserved
0x1E[0]
1
Reserved
0x20[0]
0
36
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