DS125MB203_15 Datasheet, PDF (3/54 Pages) Texas Instruments – Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer

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DS125MB203
SNLS432C – OCTOBER 2012 – REVISED DECEMBER 2015
5 Description continued
The programmable settings can be applied through pin settings, SMBus (I²C) protocol or loaded directly from an
external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded
on power up, which eliminates the need for an external microprocessor or software driver.
6 Pin Configuration and Functions
NJY Package
54-Pin WQFN
Top View (looking down through package)
NC 1
NC 2
D_OUT0+ 3
D_OUT0- 4
NC 5
NC 6
D_OUT1+ 7
D_OUT1- 8
VDD 9
D_IN0+ 10
D_IN0- 11
NC 12
NC 13
VDD 14
D_IN1+ 15
D_IN1- 16
NC 17
NC 18
SMBUS AND CONTROL
TOP VIEW
DAP = GND
LDO REG
3.3V to 2.5V
45 S_INA0+
44 ^S_INA0-
43 S_INB0+
42 S_INB0-
41 VDD
40 S_INA1+
39 S_INA1-
38 _{S_INB1+}
37 S_INB1-
36 VDD
35 S_OUTA0+
34 S_OUTA0-
33 S_OUTB0+
32 S_OUTB0-
31 S_OUTA1+
30 ^S_OUTA1-
29 S_OUTB1+
28 S_OUTB1-
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