TLFD500 Datasheet, PDF(3/38 Page) Texas Instruments – 3.3 V INTEGRATED G.LITE ANALOG FRONT END

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

TLFD500 Datasheet, PDF (3/38 Pages) Texas Instruments – 3.3 V INTEGRATED G.LITE ANALOG FRONT END

◁

functional block diagram

TLFD500PN

3.3 V INTEGRATED G.LITE ANALOG FRONT END

SLAS207B â JUNE 1999 â REVISED MAY 2000

276

KSPS

30 kHz to 138 kHz

30 kHz

138 kHz

Digital

HPF

Digital

LPF

14 Bit

4.416 MSPS

DAC

138 kHz

0 to â24 dB

(â1 dB/step)

TX PAA

LPF

PAA

TXOUTP/

TXOUTM

FSR

FSX

SDR

SDX

SCLK

Digital Loop-back

Serial

Interface

and

Control

1104

KSPS

552 kHz

LPF

INTERNAL CLOCK

Clock

Generator

VCXO

DAC

DPLL

VCXOCNTL

MCLKIN

External

VCXO

External

Oscillator

35.328 MHz

NOTE: Refer to Figure 17 for application details.

0 to 9 dB

14 Bit (0.25 dB/Step)

4.416 MSPS RX PGA3

Analog

Loop-back

552 kHz

ADC

PGA

Equalizer+

RX LPF

RXINP/

RXINM

See Note

0 to 18 dB

(6 dB/step)

RX PGA2

PGA

180 kHz

HPF2

0 to 12 dB

(3 dB/Step)

RX PGA1

PGA

HPF2OUTP/

HPF2OUTM

HPF2INP/

HPF2INM

See Note

180 kHz

HPF1

INTERNAL

REFERENCE

General

Purpose I/O

AUX Amps(4)

HPF1OUTP/

HPF1OUTM

HPF1INP/

HPF1INM

AMPOUTP/

AMPOUTM

AMPINP/

AMPINM

VMID_RX

REFP

REFM

GPI00âGPI07

TXBANDGAP/

RXBANDGAP

â¢ POST OFFICE BOX 655303 DALLAS, TEXAS 75265

▷