TLFD500 Datasheet, PDF (21/38 Pages) Texas Instruments – 3.3 V INTEGRATED G.LITE ANALOG FRONT END

TLFD500PN
3.3 V INTEGRATED G.LITE ANALOG FRONT END
VCR-M – VCXO DAC control register MSB
SLAS207B – JUNE 1999 – REVISED MAY 2000
Address: 00110b
D7
VCR–M[7]
D6
VCR–M[6]
Contents at reset: 00000000b
D5
D4
D3
VCR–M[5] VCR–M[4] VCR–M[3]
D2
VCR–M[2]
D1
VCR–M[1]
D0
VCR–M[0]
VCR-L – VCXO DAC control register LSB
Address: 00111b
D7
D6
0
0
Contents at reset: 00000000b
D5
D4
D3
0
0
VCR–L[3]
Table 8 shows some representative analog outputs.
D2
VCR–L[2]
D1
VCR–L[1]
D0
VCR–L[0]
Table 8. Representative Analog Outputs
OPERATION
VCR–M[7:0] * 24 + VCR–L[3:0]
Where step–size, ∆ = (3/4095) V.
HEX RESULT
0x800
0x801
…
0xFFF
0x000
0x001
…
0x7FE
0x7FF
ANALOG OUTPUT COMMENTS
0V
Min scale
∆V
Just above min
…
…
2047∆V
Just below mid
2048∆V
Mid scale
2049∆V
Just above mid
…
…
4094∆V
Just below max
4095∆V
Max scale
For example, if 0xAA7 is desired, VCR-M and VCR-L should be set to 0xAA and 0x07;
if 0x539 is desired, VCR-M and VCR-L should be set to 0x53 and 0x09.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
21