DS110RT410_15 Datasheet, PDF (23/60 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

www.ti.com
DS110RT410
SNLS460A – MAY 2013 – REVISED OCTOBER 2015
7. Once the controller has determined what condition caused the interrupt, the controller can then take the
appropriate action. For example, the controller might reset the CDR to cause the retimer to re-adapt to the
incoming signal. If there is no longer an incoming signal (indicated by a loss of signal interrupt, bit 0 of
channel register 0x01), then the controller might alert an operator or change the channel configuration. This
is system dependent.
8. Reading the interrupt status registers will clear the interrupt. If this does not cause the interrupt input to go
high, then another device on the same input has generated an interrupt. The controller can address the next
device using the previous procedure.
9. Once all the interrupt registers for all channels for all DS110RT410 devices that generated interrupts have
been read, clearing all the interrupt indications, the INT line should go high again. This indicates that all the
existing interrupt conditions have been serviced.
The channel registers referred to previously, registers 0x01, 0x30, 0x32, and 0x36, are described in the channel
registers table, Table 15.
7.5.8 Overriding the CTLE Boost Setting
Register 0x03, Register 0x13, bit 2, and Register 0x3a
To override the CTLE boost settings, register 0x03 is used. This register contains the currently-applied CTLE
boost settings. The boost values can be overridden by using the two-bit fields in this register as listed in the
table.
The final stage of the CTLE has an additional control bit which sets it to a limiting mode. For some channels, this
additional setting improves the bit error rate performance. This bit is bit 2 of register 0x13.
If the DS110RT410 loses lock because of a change in the CTLE settings, the DS110RT410 will initiate its lock
and adaptation sequence again. Thus, if you write new CTLE boost values to register 0x03 and 0x13 that cause
the DS110RT410 to drop out of lock, the DS110RT410 may, in the process of reacquiring the CDR lock, reset
the CTLE settings to different values than those you set in register 0x03 and 0x13. If this behavior is not
understood, it can appear that the DS110RT410 did not accept the values you wrote to the CTLE boost registers.
What is really happening, however, is that the lock and adaptation sequence is overriding the CTLE values you
wrote to the CTLE boost registers. This will not happen unless the DS110RT410 drops out of lock.
If the adapt mode is set to 0 (bits 6:5 of channel register 0x31), then the CTLE boost values will not be
overridden, but the DS110RT410 may still lose lock. If this happens, the DS110RT410 will attempt to reacquire
lock. if the reference mode is set appropriately, and if the rate/subrate code is set to permit it, the DS110RT410
will begin searching for CDR lock at the highest allowable VCO divider ratio – that is, at the lowest configured bit
rate. At divider values of 4 and 8, the CTLE boost settings used will come not from the values in register 0x03,
and 0x13, but rather from register 0x3a, the fixed CTLE boost setting for lower data rates. This setting will be
written into boost setting register 0x03 during the lock search process. This value may be different from the value
you set in register 0x03, so, again, it may appear that the DS110RT410 has not accepted the CTLE boost
settings you set in registers 0x03 and 0x13. The interactions of the lock and adaptation sequences with the
manually-set CTLE boost settings can be difficult to understand.
To manually override the CTLE boost under all conditions, perform the following steps.
1. Set the DS110RT410 channel adapt mode to 0 by writing 0x0 to bits 6:5 of channel register 0x31.
2. Set the desired CTLE boost setting in register 0x3a. If the DS110RT410 loses lock and attempts to lock to a
lower data rate, it will use this CTLE boost setting.
3. Set the desired CTLE boost setting in register 0x03.
4. Set the desired CTLE boost setting in register 0x40.
5. If desired, set the CTLE stage 3 limiting bit, bit 2 of register 0x13.
If the DS110RT410 loses lock when the CTLE boost settings are set according to the sequence described
previously, the DS110RT410 will try to reacquire lock, but it will not change the CTLE boost settings in order to
do so.
Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: DS110RT410
Submit Documentation Feedback
23