DS110RT410_15 Datasheet, PDF (13/60 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

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DS110RT410
SNLS460A – MAY 2013 – REVISED OCTOBER 2015
Feature Description (continued)
7.3.6 Device Configuration
The DS110RT410 can be configured by the user to optimize its operation. The four channels can be optimized
independently in SMBus master or SMBus slave mode. The operational settings available for user configuration
include the following.
• Rate and subrate setting
• Driver output voltage
• Driver output de-emphasis
• Driver output rise/fall time
7.3.6.1 Rate and Subrate Setting
Register 0x2f, bits 7:4, Registers 0x60, 0x61, 0x62, 0x63, and 0x64
The DS110RT410 is part of a family of retimer devices differentiated by different VCO frequency ranges. Each
device in the retimer family is designed for operation in specific frequency bands and with specific data rate
standards.
The DS110RT410 is designed to lock rapidly to any valid signal present at its inputs. It is also designed to detect
incorrect lock conditions which can arise when the input data signals are strongly periodic. This condition is
referred to as false lock. The DS110RT410 discriminates against false lock by using its 25-MHz reference to
ensure that the VCO frequency resulting from its internal phase-locking process is correct.
To determine the correct VCO frequency, the digital circuitry in the DS110RT410 requires some user-supplied
information about the expected data rate or data rates. This information is provided by writing several device
registers using the SMBus.
7.4 Device Functional Modes
7.4.1 SMBus Master Mode and SMBus Slave Mode
In SMBus master mode the DS110RT410 reads its initial configuration from an external EEPROM upon power-
up. A description of the operation of this mode appears in the DS100DF410EVK, DS110DF410EVK,
DS125DF410EVM User's Guide (SNLU126).
Some of the pins of the DS110RT410 perform the same functions in SMBus master and SMBus slave mode.
Once the DS110RT410 has finished reading its initial configuration from the external EEPROM in SMBus master
mode it reverts to SMBus slave mode and can be further configured by an external controller over the SMBus.
The following two pins provide unique functions in SMBus master mode:
• ALL_DONE
• READ_EN
These pins are meant to work together. When the DS110RT410 is powered up in SMBus master mode, it reads
its configuration from the external EEPROM when the READ_EN pin goes low. When the DS110RT410 is
finished reading its configuration from the external EEPROM, it drives its ALL_DONE pin low. In applications
where there is more than one DS110RT410 on the same SMBus, bus contention can result if more than one
DS110RT410 tries to take command of the SMBus at the same time. The READ_EN and ALL_DONE pins
prevent this bus contention.
The system should be designed so that the READ_EN pin of one of the DS110RT410 devices in the system is
driven low on power-up. This DS110RT410 will take command of the SMBus on power-up and will read its initial
configuration from the external EEPROM. When it is finished reading its configuration, it will set its ALL_DONE
pin low. This pin should be connected to the READ_EN pin of another DS110RT410. When this DS110RT410
senses its READ_EN pin driven low, it will take command of the SMBus and read its initial configuration from the
external EEPROM, after which it will set its ALL_DONE pin low. By connecting the ALL_DONE pin of each
DS110RT410 to the READ_EN pin of the next DS110RT410, each DS110RT410 can read its initial configuration
from the EEPROM without causing bus contention.
For SMBus slave mode, the READ_EN pin must be tied low. Do not leave the READ_EN pin floating or tie it
high.
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