DS90UB921-Q1 Datasheet, PDF (1/57 Pages) Texas Instruments – 5 - 96 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel

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DS90UB921-Q1
SNLS488 – MARCH 2016
DS90UB921-Q1 5 - 96 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control
Channel
1 Features
•1 Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 2: -40℃ to +105℃
Ambient Operating Temperature Range
– Device HBM ESD Classification Level ±8kV
– Device CDM ESD Classification Level C6
• Supports Extended High Definition
(1920x720p/60Hz) Digital Video Format
• 5 – 96MHz PCLK Supported (STP mode)
• 15 – 96MHz PCLK Supported (Coax mode)
• RGB888 + VS, HS, and DE
• Parallel LVCMOS Video Inputs
• Spread Spectrum Tolerant Input
• 4 Optional Bidirectional GPIO Channels
• Bidirectional Control Interface Channel Interface
with I²C Compatible Serial Control Bus
• Optional I²S Support
• AC-Coupled Coax or STP Interconnect Up to 10
meters
• Single 3.3 V Operation with 1.8 V or 3.3 V
Compatible LVCMOS I/O Interface
• DC-Balanced and Scrambled Data with
Embedded Clock
• Internal Pattern Generation
• Low Power Modes Minimize Power Dissipation
• >8kV ISO 10605 ESD Rating
2 Applications
• Automotive Touch Screen Display
• Automotive Display for Navigation
• Automotive Instrument Cluster
3 Description
The DS90UB921-Q1 serializer, in conjunction with a
DS90UB922-Q1, DS90UB926Q-Q1, DS90UB928Q-
Q1, DS90UB948-Q1, or DS90UB940-Q1 deserializer,
provides a complete digital interface for concurrent
transmission of high-speed video, audio, and control
data for automotive display and image sensing
applications.
The chipset is ideally suited for automotive video-
display systems with WVGA and HD formats. The
DS90UB921-Q1 incorporates an embedded
bidirectional control channel and low latency GPIO
controls. This chipset translates a parallel interface
into a single pair high-speed serialized interface. The
serial bus scheme, FPD-Link III, supports full duplex
of high-speed video data transmission and
bidirectional control communication over a single link.
Consolidation of video data and control over a single
differential pair (or single wire) reduces the
interconnect size and weight, while also eliminating
skew issues and simplifying system design.
The DS90UB921-Q1 serializer embeds the clock, DC
scrambles & balances the data payload, and level
shifts the signals to high-speed low voltage
differential (or single-ended) signaling. Up to 24 data
bits are serialized along the video control signals.
EMI is minimized by the use of low voltage swing
signaling, data scrambling and randomization and
spread spectrum clocking compatibility.
Remote interrupts from the downstream deserializer
are mirrored to a local output pin.
Device Information ⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS90UB921-Q1
WQFN (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
HOST
Graphics
Processor
VDDIO VDD33
(1.8V or 3.3V) (3.3V)
R[7:0]
G[7:0]
B[7:0]
HS
VS
DE
PCLK
PDB
I2S AUDIO ³
(STEREO)
DOUT+
DOUT-
DS90UB921-Q1
Serializer
SCL
SDA
IDx
DAP
VDD33 VDDIO
(3.3V) (1.8V or 3.3V)
FPD-Link III
1 Coax / AC Coupled
MODE_SEL
INTB
PDB
OSS_SEL
OEN
MODE_SEL
INTB_IN
SCL
SDA
IDx
RIN+
RIN-
DS90UB922-Q1
Deserializer
R[7:0]
G[7:0]
B[7:0]
HS
VS
DE
PCLK
LOCK
PASS
RGB Display
720p
24-bit color depth
3
I2S AUDIO
(STEREO)
MCLK
DAP
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.