LM3S6952 Datasheet, PDF (9/626 Pages) Texas Instruments – Stellaris LM3S6952 Microcontroller

Stellaris® LM3S6952 Microcontroller
List of Figures
Figure 1-1. Stellaris^® LM3S6952 Microcontroller High-Level Block Diagram ............................. 38
Figure 2-1. CPU Block Diagram ............................................................................................. 47
Figure 2-2. TPIU Block Diagram ............................................................................................ 48
Figure 5-1. JTAG Module Block Diagram ................................................................................ 58
Figure 5-2. Test Access Port State Machine ........................................................................... 61
Figure 5-3. IDCODE Register Format ..................................................................................... 67
Figure 5-4. BYPASS Register Format .................................................................................... 67
Figure 5-5. Boundary Scan Register Format ........................................................................... 68
Figure 6-1. Basic RST Configuration ...................................................................................... 70
Figure 6-2. External Circuitry to Extend Power-On Reset ........................................................ 71
Figure 6-3. Reset Circuit Controlled by Switch ........................................................................ 71
Figure 6-4. Power Architecture .............................................................................................. 73
Figure 6-5. Main Clock Tree .................................................................................................. 75
Figure 7-1. Hibernation Module Block Diagram ..................................................................... 135
Figure 7-2. Clock Source Using Crystal ................................................................................ 136
Figure 7-3. Clock Source Using Dedicated Oscillator ............................................................. 137
Figure 8-1. Flash Block Diagram .......................................................................................... 154
Figure 9-1. GPIO Port Block Diagram ................................................................................... 181
Figure 9-2. GPIODATA Write Example ................................................................................. 182
Figure 9-3. GPIODATA Read Example ................................................................................. 182
Figure 10-1. GPTM Module Block Diagram ............................................................................ 223
Figure 10-2. 16-Bit Input Edge Count Mode Example .............................................................. 227
Figure 10-3. 16-Bit Input Edge Time Mode Example ............................................................... 228
Figure 10-4. 16-Bit PWM Mode Example ................................................................................ 229
Figure 11-1. WDT Module Block Diagram .............................................................................. 259
Figure 12-1. ADC Module Block Diagram ............................................................................... 283
Figure 12-2.
Figure 12-3.
Figure 12-4.
Figure 12-5.
Differential Sampling Range, V_{IN_ODD} = 1.5 V ...................................................... 286
Differential Sampling Range, V_{IN_ODD} = 0.75 V .................................................... 287
Differential Sampling Range, V_{IN_ODD} = 2.25 V .................................................... 287
Internal Temperature Sensor Characteristic ......................................................... 288
Figure 13-1. UART Module Block Diagram ............................................................................. 320
Figure 13-2. UART Character Frame ..................................................................................... 321
Figure 13-3. IrDA Data Modulation ......................................................................................... 323
Figure 14-1. SSI Module Block Diagram ................................................................................. 360
Figure 14-2. TI Synchronous Serial Frame Format (Single Transfer) ........................................ 363
Figure 14-3. TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 363
Figure 14-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 364
Figure 14-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 364
Figure 14-6. Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 365
Figure 14-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 366
Figure 14-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 ........ 366
Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1 ......................................... 367
Figure 14-10. MICROWIRE Frame Format (Single Frame) ........................................................ 368
Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 369
Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 369
April 05, 2010
9
Texas Instruments-Production Data