LM3S6952 Datasheet, PDF (552/626 Pages) Texas Instruments – Stellaris LM3S6952 Microcontroller

Signal Tables
Table 21-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
66
PB0
I/O
TTL
GPIO port B bit 0.
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
67
PB1
I/O
TTL
GPIO port B bit 1.
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
68
VDD
-
Power Positive supply for I/O and some logic.
69
GND
-
Power Ground reference for logic and I/O pins.
70
PB2
I/O
TTL
GPIO port B bit 2.
I2C0SCL
I/O
OD
I²C module 0 clock.
71
PB3
I/O
TTL
GPIO port B bit 3.
I2C0SDA
I/O
OD
I²C module 0 data.
72
PE0
I/O
TTL
GPIO port E bit 0.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
73
PE1
I/O
TTL
GPIO port E bit 1.
74
PE2
I/O
TTL
GPIO port E bit 2.
75
PE3
I/O
TTL
GPIO port E bit 3.
76
CMOD1
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
77
PC3
I/O
TTL
GPIO port C bit 3.
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
78
PC2
I/O
TTL
GPIO port C bit 2.
TDI
I
TTL
JTAG TDI.
79
PC1
I/O
TTL
GPIO port C bit 1.
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
80
PC0
I/O
TTL
GPIO port C bit 0.
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
83
VCCPHY
-
Power VCC of the Ethernet PHY.
84
VCCPHY
-
Power VCC of the Ethernet PHY.
85
GNDPHY
-
Power GND of the Ethernet PHY.
86
GNDPHY
-
Power GND of the Ethernet PHY.
87
GND
-
Power Ground reference for logic and I/O pins.
88
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
89
PB7
I/O
TTL
GPIO port B bit 7.
TRST
I
TTL
JTAG TRST.
90
PB6
I/O
TTL
GPIO port B bit 6.
C0+
I
Analog Analog comparator 0 positive input.
C0o
O
TTL
Analog comparator 0 output.
552
April 05, 2010
Texas Instruments-Production Data