LM3S6952 Datasheet, PDF (69/626 Pages) Texas Instruments – Stellaris LM3S6952 Microcontroller

Stellaris® LM3S6952 Microcontroller
6 System Control
6.1
6.1.1
6.1.2
6.1.2.1
6.1.2.2
6.1.2.3
System control determines the overall operation of the device. It provides information about the
device, controls the clocking to the core and individual peripherals, and handles reset detection and
reporting.
Functional Description
The System Control module provides the following capabilities:
■ Device identification, see “Device Identification” on page 69
■ Local control, such as reset (see “Reset Control” on page 69), power (see “Power
Control” on page 72) and clock control (see “Clock Control” on page 74)
■ System control (Run, Sleep, and Deep-Sleep modes), see “System Control” on page 77
Device Identification
Several read-only registers provide software with information on the microcontroller, such as version,
part number, SRAM size, flash size, and other features. See the DID0, DID1, and DC0-DC4 registers.
Reset Control
This section discusses aspects of hardware functions during reset as well as system software
requirements following the reset sequence.
CMOD0 and CMOD1 Test-Mode Control Pins
Two pins, CMOD0 and CMOD1, are defined for internal use for testing the microcontroller during
manufacture. They have no end-user function and should not be used. The CMOD pins should be
connected to ground.
Reset Sources
The controller has five sources of reset:
1. External reset input pin (RST) assertion, see “External RST Pin” on page 70.
2. Power-on reset (POR), see “Power-On Reset (POR)” on page 69.
3. Internal brown-out (BOR) detector, see “Brown-Out Reset (BOR)” on page 71.
4. Software-initiated reset (with the software reset registers), see “Software Reset” on page 72.
5. A watchdog timer reset condition violation, see “Watchdog Timer Reset” on page 72.
After a reset, the Reset Cause (RESC) register is set with the reset cause. The bits in this register
are sticky and maintain their state across multiple reset sequences, except when an internal POR
is the cause, and then all the other bits in the RESC register are cleared except for the POR indicator.
Power-On Reset (POR)
Note: The power-on reset also resets the JTAG controller. An external reset does not.
April 05, 2010
69
Texas Instruments-Production Data