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LM3S6952 Datasheet, PDF (570/626 Pages) Texas Instruments – Stellaris LM3S6952 Microcontroller
Signal Tables
Table 21-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Typea Description
SSI0Tx
M5
O
TTL
SSI module 0 transmit.
SWCLK
A9
I
TTL
JTAG/SWD CLK.
SWDIO
B9
I/O
TTL
JTAG TMS and SWDIO.
SWO
A10
O
TTL
JTAG TDO and SWO.
TCK
A9
I
TTL
JTAG/SWD CLK.
TDI
B8
I
TTL
JTAG TDI.
TDO
A10
O
TTL
JTAG TDO and SWO.
TMS
B9
I/O
TTL
JTAG TMS and SWDIO.
TRST
A8
I
TTL
JTAG TRST.
TXON
L8
O
Analog TXON of the Ethernet PHY.
TXOP
M8
O
Analog TXOP of the Ethernet PHY.
U0Rx
L3
I
TTL
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
U0Tx
M3
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
U1Rx
H2
I
TTL
UART module 1 receive. When in IrDA mode, this signal has
IrDA modulation.
U1Tx
H1
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has
IrDA modulation.
U2Rx
K1
I
TTL
UART module 2 receive. When in IrDA mode, this signal has
IrDA modulation.
U2Tx
K2
O
TTL
UART module 2 transmit. When in IrDA mode, this signal has
IrDA modulation.
VBAT
L12
-
Power Power source for the Hibernation module. It is normally
connected to the positive terminal of a battery and serves as
the battery backup/Hibernation module power-source supply.
VCCPHY
C10
-
Power VCC of the Ethernet PHY.
D10
D11
VDD25
C3
-
Power Positive supply for most of the logic function, including the
D3
processor core and most peripherals.
F3
G3
VDD33
E10
-
Power Positive supply for I/O and some logic.
G10
G11
G12
H10
K7
K8
K9
VDDA
C6
-
Power The positive supply (3.3 V) for the analog circuits (ADC,
C7
Analog Comparators, etc.). These are separated from VDD
to minimize the electrical noise contained on VDD from
affecting the analog functions. VDDA pins must be connected
to 3.3 V, regardless of system implementation.
WAKE
M10
I
TTL
An external input that brings the processor out of Hibernate
mode when asserted.
570
April 05, 2010
Texas Instruments-Production Data