LM3S6952 Datasheet, PDF (474/626 Pages) Texas Instruments – Stellaris LM3S6952 Microcontroller

Ethernet Controller
Register 23: Ethernet PHY Management Register 17 – Interrupt Control/Status
(MR17), address 0x11
This register provides the means for controlling and observing the events which trigger a PHY layer
interrupt in the MACRIS register. This register can also be used in a polling mode via the Media
Independent Interface as a means to observe key events within the PHY layer via one register
address. Bits 0 through 7 are status bits which are each set based on an event. These bits are
cleared after the register is read. Bits 8 through 15 of this register, when set, enable the corresponding
bit in the lower byte to signal a PHY layer interrupt in the MACRIS register.
Ethernet PHY Management Register 17 – Interrupt Control/Status (MR17)
Base 0x4004.8000
Address 0x11
Type R/W, reset 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
JABBER_IE RXER_IE PRX_IE PDF_IE LPACK_IE LSCHG_IE RFAULT_IE ANEGCOMP_IE JABBER_INT RXER_INT PRX_INT PDF_INT LPACK_INT LSCHG_INT RFAULT_INT ANEGCOMP_INT
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RC
RC
RC
RC
RC
RC
RC
RC
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
15
14
13
12
11
10
9
8
Name
JABBER_IE
RXER_IE
PRX_IE
PDF_IE
LPACK_IE
LSCHG_IE
RFAULT_IE
ANEGCOMP_IE
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
Jabber Interrupt Enable
When set, this bit enables system interrupts when a Jabber condition
is detected by the Ethernet Controller.
Receive Error Interrupt Enable
When set, this bit enables system interrupts when a receive error is
detected by the Ethernet Controller.
Page Received Interrupt Enable
When set, this bit enables system interrupts when a new page is received
by the Ethernet Controller.
Parallel Detection Fault Interrupt Enable
When set, this bit enables system interrupts when a Parallel Detection
Fault is detected by the Ethernet Controller.
LP Acknowledge Interrupt Enable
When set, this bit enables system interrupts when FLP bursts are
received with the ACK bit in the MR5 register during auto-negotiation.
Link Status Change Interrupt Enable
When set, this bit enables system interrupts when the link status changes
from OK to FAIL.
Remote Fault Interrupt Enable
When set, this bit enables system interrupts when a remote fault
condition is signaled by the link partner.
Auto-Negotiation Complete Interrupt Enable
When set, this bit enables system interrupts when the auto-negotiation
sequence has completed successfully.
474
April 05, 2010
Texas Instruments-Production Data