DRV8305_15 Datasheet, PDF (7/53 Pages) Texas Instruments – DRV8305 Three Phase Gate Driver With Current Shunt Amplifiers and Voltage Regulator

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DRV8305
SLVSCX2A – AUGUST 2015 – REVISED SEPTEMBER 2015
6.5 Electrical Characteristics
PVDD = 4.4 to 45 V, T_A = 25°C, unless specified under test condition
PARAMETER
TEST CONDITIONS
MIN
POWER SUPPLIES (PVDD, DVDD, AVDD)
4.4
V_PVDD
PVDD operating voltage
VREG (voltage regulator) operational
4.3
I_{PVDD_Operating}
PVDD operating supply
current
EN_GATE = enabled; LDO reg =
enabled at no load; outputs HiZ
I_{PVDD_Standby}
PVDD standby supply
current
EN_GATE = disabled; LDO reg =
enabled at no load
I_{PVDD_Sleep}
PVDD sleep supply current
EN_GATE = disabled; LDO reg =
disabled; ready for WAKE
V_AVDD
Internal regulator voltage
PVDD = 5.3 to 45 V
PVDD = 4.4 to 5.3 V
4.85
PVDD –
0.22
V_DVDD
Internal regulator voltage
VOLTAGE REGULATOR (VREG)
PVDD = 5.3 to 45 V
VSET –
(0.03 ×
VSET)
VVREG
VREG DC output voltage PVDD = 4.3 to 5.3 V; 5-V regulator
PVDD – 0.4
V
PVDD = 4.3 to 5.3 V; 3.3-V regulator
VSET –
(0.03 ×
VSET)
V_LineReg
Line regulation ΔV_OUT/ΔV_IN 5.3 V ≤ V_IN ≤ 12 V; I_O = 1 mA
V_LoadReg
Load regulation
ΔV_OUT/ΔI_OUT
100 µA ≤ I_OUT ≤ 50 mA
V_do
Dropout voltage
I_OUT = 100 µA; 3.3 V
I_OUT = 50 mA; 3.3 V
LOGIC-LEVEL INPUTS (INHA, INLA, INHB, INLB, INHC, INLC, EN_GATE, SCLK, nSCS)
V_IL
Input logic low voltage
0
V_IH
Input logic high voltage
2
R_PD
Internal pull down resistor To GND
CONTROL OUTPUTS (nFAULT, SDO, PWRGD)
V_OL
Output logic low voltage
I_O = 5 mA
V_OH
Output logic high voltage
2.4
I_OH
Output logic high leakage V_O = 3.3 V
–1
HIGH VOLTAGE TOLERANT LOGIC INPUT (WAKE)
V_{IL_WAKE}
Output logic low voltage
V_{IH_WAKE}
Output logic high voltage
GATE DRIVE OUTPUT (GHA, GHB, GHC, GLA, GLB, GLC)
1.1
1.42
V_PVDD = 8 to 45 V; I_GATE < 30 mA, C_VCPH
= 2.2 μF, C_CP1/CP2 = 0.047 μF, C_{VCP_LSD}
9
= 1 μF
V_GHS
High side gate driver Vgs
voltage
V_PVDD = 5.5 to 8 V; I_GATE < 6 mA, C_VCPH
= 2.2 μF, C_CP1/CP2 = 0.047 μF, C_{VCP_LSD}
= 1 μF
7.2
V_PVDD = 4.4 to 5.5 V; I_GATE < 6 mA,
C_VCPH = 2.2 μF, C_CP1/CP2 = 0.047 μF,
5
C_{VCP_LSD} = 1 μF
TYP
MAX UNIT
15
4
60
5
PVDD
3.3
45
V
45
mA
7 mA
175 μA
5.15
V
V
VSET
VSET
10
0.05
0.2
VSET +
(0.03 ×
VSET)
PVDD V
VSET +
(0.03 ×
VSET)
30 mV
30 mV
0.1
V
0.4
0.8 V
5V
100
kΩ
0.5 V
V
1 μA
1.41 V
1.75 V
10
10.5
9V
7.2
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