DRV8305_15 Datasheet, PDF (32/53 Pages) Texas Instruments – DRV8305 Three Phase Gate Driver With Current Shunt Amplifiers and Voltage Regulator

DRV8305
SLVSCX2A – AUGUST 2015 – REVISED SEPTEMBER 2015
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7.6.1 Read / Write Bit
The MSB bit of SDI word (W0) is read/write bit. When W0 = 0, input data is a write command; when W0 = 1,
input data is a read command, and the register value will send out on the same word cycle from SDO from D10
to D0.
7.6.2 Status Registers
Status registers are used to report warning, fault conditions and provide a means to prevent timing out of the
watchdog timer. Status registers are read only registers.
7.6.3 0x1 Warning and Watchdog Reset
Table 10. Warning and Watchdog Reset Register Description
BIT
R/W
NAME
DEFAULT
DESCRIPTION
10
R
FAULT
0x0
0 - Warning,
1 - Latched fault
9
R
Reserved
0x0
8
R
TEMP_Flag4
0x0
Temperature flag setting for about 175°C
7
R
PVDD_UVFL
0x0
PVDD undervoltage flag warning
6
R
PVDD_OVFL
0x0
PVDD overvoltage flag warning
5
R
VDS_STATUS
0x0
Real time or of all VDS sensors (0x2[D10:5])
4
R
VCHP_UVFL
0x0
Charge pump undervoltage flag warning
3
R
TEMP_Flag1
0x0
Temperature flag setting for about 105°C
2
R
TEMP_Flag2
0x0
Temperature flag setting for about 125°C
1
R
TEMP_Flag3
0x0
Temperature flag setting for about 135°C
0
R
OTW
0x0
Overtemperature warning
7.6.4 0x2 OV/VDS Faults
Table 11. OV/VDS Faults Register Description
BIT
R/W
NAME
DEFAULT
DESCRIPTION
10
R
FETHA_VDS
0x0
VDS monitor fault for high-side FET A
9
R
FETLA_VDS
0x0
VDS monitor fault for low-side FET A
8
R
FETHB_VDS
0x0
VDS monitor fault for high-side FET B
7
R
FETLB_VDS
0x0
VDS monitor fault for low-side FET B
6
R
FETHC_VDS
0x0
VDS monitor fault for high-side FET C
5
R
FETLC_VDS
0x0
VDS monitor fault for low-side FET C
4:3
R
Reserved
0x0
2
R
SNS_C_OCP
0x0
Sense C overcurrent protection flag
1
R
SNS_B_OCP
0x0
Sense B overcurrent protection flag
0
R
SNS_A_OCP
0x0
Sense A overcurrent protection flag
32
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