DRV8305_15 Datasheet, PDF (5/53 Pages) Texas Instruments – DRV8305 Three Phase Gate Driver With Current Shunt Amplifiers and Voltage Regulator

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DRV8305
SLVSCX2A – AUGUST 2015 – REVISED SEPTEMBER 2015
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range referenced with respect to GND (unless otherwise noted) ⁽¹⁾
MIN
MAX
Power supply voltage (PVDD)
–0.3
45
Power supply voltage ramp rate (VM)
0
2
Charge pump voltage (CP1H,CP1L, CP2L,CP2H, VCPH, VCP_LSD)
–0.3
PVDD + 12
High side gate driver voltage (GHA, GHB, GHC)
–3
57
Low-side gate driver voltage (GHA, GHB, GHC)
–2
12
High side gate driver source pin voltage (SHA, SHB, SHC)
–5
45
Low-side gate driver source pin voltage (SLA, SLB, SLC)
–3
5
Internal phase clamp pin voltage difference {(GHA-SHA), (GHB-SHB), (GHC-SHC),
(GLA-SLA), (GLB-SLB), (GLC-SLC)}
–0.3
15
Drain pin voltage drain (VDRAIN)
–0.3
45
Max source current (VDRAIN) – limit current with external series resistor
–20
Max sink current (VDRAIN)
2
Voltage difference between supply and VDRAIN (PVDD-VDRAIN)
–10
10
Control pin voltage range (INHA, INLA, INHB, INLB, INHC, INLC, EN_GATE, SCLK,
SDI, SCS, SDO, nFAULT, PWRGD)
–0.3
5.5
Open drain pins skink current (nFAULT, PWRGD)
7
Wake pin voltage (WAKE)
–0.3
45
Wake pin sink current (WAKE) – limit with external series resistor
1
Sense amp voltage (SPA, SNA, SPB, SNB, SPC, SNC)
–2
5
Externally applied reference voltage (VREG) – when vreg_vref = 1
–0.3
5.5
Externally applied reference sink current (VREG) – when vreg_vref = 1
100
Operating ambient temperature, T_A
Operating junction temperature, T_J
Storage temperature, T_stg
–40
125
–40
150
–55
150
UNIT
V
V/µs
V
V
V
V
V
V
V
mA
mA
V
V
mA
V
mA
V
V
µA
°C
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 ⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101 ⁽²⁾
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
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