DRV8305_15 Datasheet, PDF (29/53 Pages) Texas Instruments – DRV8305 Three Phase Gate Driver With Current Shunt Amplifiers and Voltage Regulator

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DRV8305
SLVSCX2A – AUGUST 2015 – REVISED SEPTEMBER 2015
Device Functional Modes (continued)
7.4.1.4 SLEEP State
The SLEEP state is invoked by issuing a SLEEP command through SPI. After the SLEEP command is received,
the VREG and the gate driver safely power down internally after a programmable delay.
The DRV8305 can then only be enabled through the WAKE pin which is a high-voltage-tolerant input pin.
For the DRV8305 to be brought out of SLEEP, the WAKE pin must be at a voltage greater than 3 V. This allows
the WAKE to be driven, for example, directly by the battery through a switch, through the inhibit pin (INH) on
standard LIN interface or through standard digital logic. The WAKE pin will only react to a wake-up command if
PVDD > V_{PVDD_UVLO2}.
After the DRV8305 is out of SLEEP mode, all activity on the WAKE pin is ignored.
SLEEP state erases the values in the SPI control registers. TI does not recommend to write through SPI in
SLEEP state.
Copyright © 2015, Texas Instruments Incorporated
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