TL16C750 Datasheet, PDF (6/35 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL

TL16C750
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL
SLLS191C – JANUARY 1995 – REVISED DECEMBER 1997
autoflow control (continued)
ACE1
ACE2
D7– D0
RCV
FIFO
XMT
FIFO
Serial to
SIN
Parallel
Flow
Control
RTS
Parallel ^SOUT
to Serial
Flow
Control
CTS
SOUT
Parallel
to Serial
CTS
Flow
Control
SIN
RTS
Serial to
Parallel
Flow
Control
XMT
FIFO
RCV
FIFO
D7– D0
Figure 1. Autoflow Control (auto-RTS and auto-CTS) Example
auto-RTS (see Figure 1)
Auto-RTS data flow control originates in the receiver timing and control block (see functional block diagram)
and is linked to the programmed receiver FIFO trigger level. When the receiver FIFO level reaches a trigger level
of 1, 4, 8, or 14 in 16-byte mode or 1, 16, 32, or 56 in 64-byte mode, RTS is deasserted. The sending ACE may
send an additional byte after the trigger level is reached (assuming the sending ACE has another byte to send)
because it may not recognize the deassertion of RTS until after it has begun sending the additional byte. RTS
is automatically reasserted once the receiver FIFO is emptied by reading the receiver buffer register. The
reassertion signals the sending ACE to continue transmitting data.
auto-CTS (see Figure 1)
The transmitter circuitry checks CTS before sending the next data byte. When CTS is active, the transmitter
sends the next byte. To stop the transmitter from sending the following byte, CTS must be released before the
middle of the last stop bit that is currently being sent. The auto-CTS function reduces interrupts to the host
system. When flow control is enabled, the CTS state changes and does not trigger host interrupts because the
device automatically controls its own transmitter. Without auto-CTS, the transmitter sends any data present in
the transmit FIFO and a receiver overrun error can result.
enabling auto-RTS and auto-CTS
The auto-RTS and auto-CTS modes of operation are activated by setting bit 5 of the modem control register
(MCR) to 1 (see Figure 2).
SOUT
Start Bits 0 – 7 _Stop
Start Bits 0 – 7 _Stop
Start Bits 0 – 7 _Stop
CTS
NOTES: A. When CTS is low, the transmitter keeps sending serial data out.
B. When CTS goes high before the middle of the last stop bit of the current byte, the transmitter finishes sending the current byte but
it does not send the next byte.
C. When CTS goes from high to low, the transmitter begins sending data again.
Figure 2. CTS Functional Timing
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