TL16C750 Datasheet, PDF (15/35 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL

TL16C750
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL
SLLS191C – JANUARY 1995 – REVISED DECEMBER 1997
PARAMETER MEASUREMENT INFORMATION
RCLK
Sample Clock
8 Clocks
td12
TL16C450 Mode:
SIN
Start
Data Bits 5 – 8
Parity
Stop
Sample Clock
INTRPT
(data ready)
INTRPT
(receiver error)
RD1, RD2
(read RBR)
50%
50%
td13
50%
td14
50%
50% _Active
RD1, RD2
(read LSR)
50%
Active
td14
Figure 7. Receiver Timing Waveforms
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